The invention relates to digital signal processing and provides more particularly a programmable circuit for series-parallel transformation of a digital signal.
Systems for transmitting digitalized video signals convert the analog video signal, at transmission, into a parallel train of eight bits by coding on 256 levels. These signals may be used as they are in a receiving station, but when these signals are to be transmitted, they are generally in the form of series digital trains. Transcoding devices provide this parallel-series conversion.
The associated receiving device comprises a synchronization retrieval circuit associated with a reverse series-parallel transcoding circuit, for restoring, from the series train, the succession of parallel binary words corresponding to the succession of levels of the video signal. The synchronization retrieval circuit recognizes the beginning of the coded words in the series digital train. For that, in the coded signal, synchronization sequences forming the digital frame are added to the information properly speaking and transmitted during synchronization periods, for example during the line sync pulses. These sequences are formed of synchronization words chosen so as not to be found in the series train of coded words. In the receiving device, these synchronization sequences are detected for synchronizing a "parallel" clock signal corresponding to the beginnings of the coded words in the series digital train.
During transmission, the transmission channel causes degradation of the signal which results in errors in the data received which affect similarly the information and the synchronization sequences. It is therefore necessary to provide a series-parallel transformation circuit which avoids loss of synchronization due to transmission errors.